176 research outputs found

    Cryogenic MOS Transistor Model

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    This paper presents a physics-based analytical model for the MOS transistor operating continuously from room temperature down to liquid-helium temperature (4.2 K) from depletion to strong inversion and in the linear and saturation regimes. The model is developed relying on the 1D Poisson equation and the drift-diffusion transport mechanism. The validity of the Maxwell-Boltzmann approximation is demonstrated in the limit to zero Kelvin as a result of dopant freeze-out in cryogenic equilibrium. Explicit MOS transistor expressions are then derived including incomplete dopant-ionization, bandgap widening, mobility reduction, and interface charge traps. The temperature dependency of the interface-trapping process explains the discrepancy between the measured value of the subthreshold swing and the thermal limit at deep-cryogenic temperatures. The accuracy of the developed model is validated by experimental results on a commercially available 28-nm bulk CMOS process. The proposed model provides the core expressions for the development of physically-accurate compact models dedicated to low-temperature CMOS circuit simulation.Comment: Submitted to IEEE Transactions on Electron Device

    A multi-channel integrated circuit for the readout of a microstrip gas chamber

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    Abstract The design and test of an 8 channel integrated circuit for the readout of the microstrip gas chamber and other multielectrode detectors are described. The circuit is composed of 8 identical channels, each providing the amplification and the shaping of the signal delivered by the detector. The peaking time of the shaper is 25 ns and the overall amplifier gain is 8 mV 1000 e − . In addition to the analog output, each channel provides a TTL compatible digital output. The equivalent input noise is less than 700 e− rms and the total dc power consumption is about 5 mW/channel. To avoid a baseline shift due to the tail of the current issued from the detector, an adjustable pole-zero cancellation circuit has been included

    MICA: a Multichannel Integrated Charge Amplifier for the Read-out of Multielectrode Detectors

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    Abstract A 16 channel, fully parallel, CMOS integrated circuit including a preamplifier, a shaper and a discriminator, has been designed and succesfully teste

    Inflection Phenomenon in Cryogenic MOSFET Behavior

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    This brief reports the analytical modeling and measurements of the inflection in the MOSFET transfer characteristics at cryogenic temperatures. Inflection is the inward bending of the drain current versus gate voltage, which reduces the current in weak and moderate inversion at a given gate voltage compared to the drift-diffusion current. This phenomenon is explained by introducing a Gaussian distribution of localized states centered around the band edge. The localized states are attributed to disorder and interface traps. The proposed model allows to extract the density of localized states at the interface from the dc current measurements

    Energy-Efficient Broadcasting in All-Wireless Networks

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    In all-wireless networks, minimizing energy consumption is crucial as in most cases the nodes are battery-operated. We focus on the problem of power-optimal broadcast, for which it is well known that the broadcast nature of radio transmissions can be exploited to optimize energy consumption. This problem appears to be difficult to solve [30]. We provide a formal proof of NP-completeness for the general case and give an NP-completeness result for the geometric case; in the former, the network topology is represented by a generic graph with arbitrary weights, whereas in the latter a Euclidean distance is considered. For the general case, we show that it cannot be approximated better than O(log N), where N is the total number of nodes. We then describe an approximation algorithm that achieves the O(log N) approximation ratio. We also describe a new heuristic, Embedded Wireless Multicast Advantage. We show that it compares well with other proposals and we explain how it can be distribute

    Der inverse skalare KrĂŒmmungsfluss in ARW-RĂ€umen

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    Wir betrachten den inversen skalaren KrĂŒmmungsfluss in einem ARW-Raum. Wir zeigen die Existenz des Flusses fĂŒr alle Zeiten und beweisen Konvergenzresultate fĂŒr die BlĂ€tter des Flusses. Nach geeigneter Reskalierung besitzt der Fluss eine natĂŒrliche Fortsetzung ĂŒber die SingularitĂ€t hinweg in eine gespiegelte Raumzeit

    Sub-electron CIS noise analysis in 65 nm process

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    For a 4T pixel-based CMOS image sensors (CIS) readout chain, with column-level amplification and CDS, we show that the input-referred total noise in a standard 65 nm process can be reduced to 0.37 e-rms. Based on transient noise simulation using Eldo, the deep sub-electron noise performance have been reached using only circuit techniques and optimal device choices. The simulation results have been favorably compared with analytical noise calculations. The shot noise associated to the gate tunneling current has been simulated and the possibility of photoelectron counting in this 65 nm process has been demonstrated
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